Fabricating base contacts in heterojunction bipolar transistors (HBT's) using self-alignment techniques is commonly used, because self alignment techniques allow the base contacts to be placed as close to the emitter as possible, which helps reduce extrinsic resistance in the HBT. Shown in FIG. 1A is an HBT. The HBT is fabricated on a substrate, and includes a subcollector 20, collector 30, base 40, emitter 50, collector contact 60, base contacts 70, and emitter contact 80. The base contacts 70 are fabricated using a self-alignment technique. In this technique, the portion of the emitter 50 not covered by the emitter contact 80 is etched away using an isotropic wet-etchant. The wet-etchant also etches away a portion of the emitter 50 (i. e., over-etches) located under the emitter contact 80 to create an emitter having a slanted or sloped sidewall, which undercuts the emitter contact 80. The sloped sidewall is a result of the isotropic nature of the etchant. Subsequently, the base contacts 70 are deposited on the base 40 by metal evaporation using the emitter contact 80 as a “mask”, as shown in FIG. 1A. By using the emitter contact 80 as a “mask” and controlling the “undercut” of the emitter 50 under the emitter contact 80, the spacing between the emitter 50 and base contacts 70 can ideally be controlled.
However, one problem with the self-alignment technique is the use of wet-etching to over-etch the emitter sidewall. Wet-etching does not always provide consistent results across all HBT's fabricated on a given wafer. As a result, the performance characteristics of all the HBT's cannot be accurately characterized. Furthermore, depending on the semiconductor used for the emitter, it is not always possible to over-etch the emitter sidewall. Indium Phosphide (InP), for example, is one semiconductor to which the over-etching technique is typically not applicable. As a result, a significant limitation is placed on the semiconductors that can be used in the HBT.
Inconsistencies in over-etching the emitter sidewall may also result in short-circuits between the base contacts 70 and emitter 50 as shown in FIG. 1B. Furthermore, even if the base contacts 70 are placed sufficiently far enough from the emitter 50 to prevent short-circuits, they may still lie close enough to the emitter 50 to generate an undesirable leakage current.
To overcome the problem with self-aligned base contacts using over-etching, base contacts which are lithographically aligned to the emitter are used. Using photoresist and either optical lithography or e-beam lithography, regions can be defined in the photoresist on the base, where the base contacts will be deposited. However, lithographically aligning the base contacts 70 places a high demand on the accuracy of the lithography tool. As a result, restrictions are placed on how close the base contacts 70 may be aligned to the emitter 50 sidewall. Furthermore, lithographically aligning the base contacts 70 often results in an asymmetrical placement of the base contacts 70 relative to the emitter 50, as shown in FIG. 1C.
Another approach for fabricating contacts involves depositing a metal stack on the emitter as discussed in H. Masuda et al., “Indium Phosphide and Related Materials,” 1995, Conference Proceedings, pp. 644–647. The bottom layer in the metal stacks is tungsten silicide and the top layer is tungsten. These layers are used because when exposed to a reactive ion etch (RIE), the bottom layer etches faster than the top layer, allowing a T-shaped electrode to be formed. The T-shaped electrode is then used as a mask for depositing base contacts. However, using such a scheme results in excess parasitic resistance because the metals needed for such a technique have high resistivity.
As a result, there is a need for a method and apparatus that provides self-aligned base contacts that are symmetrically deposited with respect to the emitter. There is also a need for a method and apparatus that provides the desired spacing between the base contacts and emitter that does not rely on over-etching the emitter sidewall to undercut the emitter contact. There is also a further need for a method and apparatus that provides self-aligned base contacts and does not induce unnecessary excess parasitic resistance in the HBT.